做背景音乐的版权网站,关键字查询我的网站怎么做,深圳策划公司排行榜前十名,网站建设php怎么安装在以往采用 FPGA 实现的 FIR 滤波功能#xff0c;滤波器系数是通过 matlab 计算生成#xff0c;然后作为固定参数导入到 verilog 程序中#xff0c;这尽管简单#xff0c;但灵活性不足。在某些需求下#xff08;例如捕获任意给定台站信号#xff09;需要随时修改滤波器的… 在以往采用 FPGA 实现的 FIR 滤波功能滤波器系数是通过 matlab 计算生成然后作为固定参数导入到 verilog 程序中这尽管简单但灵活性不足。在某些需求下例如捕获任意给定台站信号需要随时修改滤波器的中心频率、带宽等信息这要么通过上位机计算系数后更新到 FPGA 端但并非所有设备都具备配套的上位机要么直接在 FPGA 端计算并更新滤波器系数。本文对后者进行实现。 计算 FIR 滤波器系数主要包括两个方面的计算窗函数计算滤波器系数计算。
窗函数生成
几种常用窗函数 首先给出几种常用的窗函数的表达式这里不对窗函数细节进行讨论
矩形窗 w ( n ) 1.0 , n 0 , 1 , . . . , N − 1 w(n) 1.0,\ n0,1,...,N-1 w(n)1.0, n0,1,...,N−1
三角窗 w ( n ) 1 − ∣ 1 − 2 n N − 1 ∣ , n 0 , 1 , . . . , N − 1 w(n)1 - |1 - \frac{2n}{N - 1}|,\ n0,1,...,N-1 w(n)1−∣1−N−12n∣, n0,1,...,N−1
图基窗 Tukey w ( n ) { 0.5 − 0.5 cos ( n π k 1 ) , 0 ≤ n ≤ k 1.0 , k n ≤ N − k − 2 0.5 − 0.5 cos ( π ( N − n − 1 ) k 1 ) , N − k − 2 n ≤ N − 1 , where k N − 2 10 w(n) \left\{ \begin{aligned} 0.5 - 0.5\cos(\frac{n\pi}{k 1}),\ 0\le n\le k\\ 1.0,\ kn\le N-k-2\\ 0.5 - 0.5\cos(\frac{\pi(N - n - 1)}{k 1}),\ N-k-2n\le N-1\ \end{aligned} \right. ,\ \text{where}\ k\frac{N-2}{10} w(n)⎩ ⎨ ⎧0.5−0.5cos(k1nπ),1.0,0.5−0.5cos(k1π(N−n−1)), 0≤n≤k kn≤N−k−2 N−k−2n≤N−1 , where k10N−2
汉宁窗 Hann w ( n ) 0.5 × [ 1.0 − cos ( 2 π n N − 1 ) ] , n 0 , 1 , . . . , N − 1 w(n)0.5 \times [1.0 - \cos(\frac{2\pi n}{N - 1})],\ n0,1,...,N-1 w(n)0.5×[1.0−cos(N−12πn)], n0,1,...,N−1
汉明窗 Hamming w ( n ) 0.54 − 0.46 cos ( 2 π n N − 1 ) , n 0 , 1 , . . . , N − 1 w(n)0.54 - 0.46\cos(\frac{2\pi n}{N - 1}),\ n0,1,...,N-1 w(n)0.54−0.46cos(N−12πn), n0,1,...,N−1
布莱克曼窗 Blackman w ( n ) 0.42 − 0.5 cos ( 2 π n N − 1 ) 0.08 cos ( 4 π n N − 1 ) , n 0 , 1 , . . . , N − 1 w(n)0.42 - 0.5\cos(\frac{2\pi n}{N - 1}) 0.08\cos(\frac{4\pi n}{N-1}),\ n0,1,...,N-1 w(n)0.42−0.5cos(N−12πn)0.08cos(N−14πn), n0,1,...,N−1
verilog 实现 可以观察到Tukey、Hann、Hamming 和 Blackman 窗都用到了余弦函数这可以用正余弦查找表实现下面代码中会用到这一模块可参考我这篇博文窗函数生成器代码如下
/* * file : FIR_windows_generator.v* author : 今朝无言* lab : WHU-EIS-LMSWE* date : 2024-09-26* version : v1.0* description : 生成指定阶数、指定类型的窗函数*/
default_nettype none
module FIR_windows_generator(
input wire clk,
input wire rst_n,input wire en, //上升沿触发窗口计算
input wire [3:0] win_type, //窗口类型1:矩形窗2:图基窗Tukey3:三角窗4:汉宁窗Hann5:海明窗Hamming6:布莱克曼窗Blackman(7:凯塞窗kaiser, 暂未实现)
input wire [15:0] n, //窗口长度
input wire [15:0] i, //窗口索引值0 ~ n-1
//input wire signed [15:0] beta, //kaiser窗的参数betawin_type7时需要这个参数其他情况可任意给值output wire busy, //指示模块是否计算完成
output wire signed [15:0] win
);reg signed [15:0] win_buf 16sd256; //8-8有符号定点数
reg signed [15:0] win_buf_d0 16sd256;
reg busy_buf 1b0;assign win win_buf_d0;
assign busy busy_buf;localparam S_IDLE 4h1;
localparam S_CAL 4h2;
localparam S_END 4h4;reg [3:0] state S_IDLE;
reg [3:0] next_state;always (posedge clk) beginif(~rst_n) beginstate S_IDLE;endelse beginstate next_state;end
endalways (*) begincase(state)S_IDLE: beginif(en_pe) beginnext_state S_CAL;endelse beginnext_state S_IDLE;endendS_CAL: begincase(win_type)4d1: begin //矩形窗next_state S_END;end4d2: begin //图基窗if(cnt 4d4) beginnext_state S_END;endelse beginnext_state S_CAL;endend4d3: begin //三角窗if(cnt 4d1) beginnext_state S_END;endelse beginnext_state S_CAL;endend4d4: begin //汉宁窗if(cnt 4d3) beginnext_state S_END;endelse beginnext_state S_CAL;endend4d5: begin //海明窗if(cnt 4d3) beginnext_state S_END;endelse beginnext_state S_CAL;endend4d6: begin //布莱克曼窗if(cnt 4d5) beginnext_state S_END;endelse beginnext_state S_CAL;endend// 4d7: begin //凯塞窗 这个涉及到循环逼近bessel函数和sqrt计算FPGA比较麻烦就先不实现这个窗口类型了// next_state S_END;// enddefault: beginnext_state S_END;endendcaseendS_END: beginnext_state S_IDLE;enddefault: beginnext_state S_IDLE;endendcase
end//en 边沿检测
wire en_pe;
detect_sig_edge detect_sig_edge_inst(.clk (clk), //工作时钟.sig (en), //待检测信号.sig_pe (en_pe), //信号上升沿.sig_ne (), //下降沿.sig_de () //双边沿
);//cnt 控制读取cosin结果以计算窗口值
reg [3:0] cnt 4d0;
always (posedge clk) begincase(state)S_IDLE: begincnt 4d0;endS_CAL: begincnt cnt 1b1;enddefault: begincnt 4d0;endendcase
end//win_buf
reg signed [31:0] multi_tmp 32sd0;
always (posedge clk) beginif(~rst_n) beginwin_buf 16sd256; //1.0endelse case(state)S_CAL: begincase(win_type)4d1: begin //矩形窗win_buf 16sd256;end4d2: begin //图基窗if(cnt 4d4) beginif(i k) beginwin_buf (16sd256 - (cos_val_s 7)) 1;endelse if(i n - k - 4d2) beginwin_buf (16sd256 - (cos_val_s 7)) 1;endelse beginwin_buf 16sd256;endendelse beginwin_buf win_buf;endend4d3: begin //三角窗if(cnt 4d0) beginmulti_tmp 16sd512 * i / (n - 1b1);endelse if(cnt 4d1) beginwin_buf 16sd256 - abs(16sd256 - multi_tmp[15:0]);endelse beginwin_buf win_buf;endend4d4: begin //汉宁窗if(cnt 4d3) beginwin_buf 16sd128 - (cos_val_s 8); //0.5 * (1.0 - cos(2 * i * pi / (n - 1)));endelse beginwin_buf win_buf;endend4d5: begin //海明窗if(cnt 4d3) beginwin_buf 16sd138 - ((16sd118 * (cos_val_s 7)) 8); //0.54 - 0.46 * cos(2 * i * pi / (n - 1));endelse beginwin_buf win_buf;endend4d6: begin //布莱克曼窗if(cnt 4d3) beginwin_buf 16sd108 - (cos_val_s 8);endelse if(cnt 4d5) beginwin_buf win_buf ((16sd82 * (cos_val_s 7)) 10);endelse beginwin_buf win_buf;endend// 4d7: begin //凯塞窗// win_buf 16sd0;// enddefault: beginwin_buf 16sd256;endendcaseenddefault: beginwin_buf win_buf;endendcase
end//busy_buf
always (*) begincase(state)S_IDLE: beginbusy_buf 1b0;enddefault: beginbusy_buf 1b1;endendcase
end//cos_phase
reg [15:0] k 16d0;
always (posedge clk) begincase(state)S_CAL: begincase(win_type)4d1: begin //矩形窗cos_phase 16d0;end4d2: begin //图基窗if(cnt 4d0) begink (n - 2d2) / 4d10;cos_phase cos_phase;endelse if(cnt 4d1) begink k;if(i k) begincos_phase i * (16d32768 / (k 1b1)) 16d16384;endelse if(i n - k - 2d2) begincos_phase (n - i - 1b1) * (16d32768 / (k 1b1)) 16d16384;endelse begincos_phase 16d0;endendelse begincos_phase cos_phase;k k;endend4d3: begin //三角窗cos_phase 16d0;end4d4: begin //汉宁窗cos_phase 2d2 * i * (16d32768 / (n - 1b1)) 16d16384;end4d5: begin //海明窗cos_phase 2d2 * i * (16d32768 / (n - 1b1)) 16d16384;end4d6: begin //布莱克曼窗if(cnt 4d0) begincos_phase 2d2 * i * (16d32768 / (n - 1b1)) 16d16384;endelse if(cnt 4d2) begincos_phase 4d4 * i * (16d32768 / (n - 1b1)) 16d16384;endelse begincos_phase cos_phase;endend// 4d7: begin //凯塞窗// cos_phase 16d0;// enddefault: begincos_phase 16d0;endendcaseenddefault: begincos_phase cos_phase;endendcase
end//sin_rom
reg [15:0] cos_phase 16d0;
wire [15:0] cos_out;
sin_gen sin_gen_inst(.clk (clk),.phase (cos_phase), //相位0~65535对应[0~2pi).sin_out (cos_out) //0~65535
);wire signed [15:0] cos_val_s;
assign cos_val_s {~cos_out[15], cos_out[14:0]};//win_buf_d0
always (posedge clk) begincase(state)S_END: beginwin_buf_d0 win_buf;enddefault: beginwin_buf_d0 win_buf_d0;endendcase
end//------------------func------------------------------
function signed [15:0] abs(input signed [15:0] a);beginabs (a 16sd0)? a : -a;end
endfunctionendmodule测试 testbench 如下
timescale 1ns/100psmodule FIR_windows_generate_tb();reg clk_100M 1b1;
always #5 beginclk_100M ~clk_100M;
endreg rst_n 1b1;reg en; //上升沿触发窗口计算
reg [3:0] win_type; //窗口类型1:矩形窗2:图基窗3:三角窗4:汉宁窗5:海明窗6:布莱克曼窗
reg [15:0] n; //滤波器阶数
reg [15:0] i; //窗口索引值0 ~ n-1wire busy;
wire signed [15:0] win;FIR_windows_generator FIR_windows_generator_inst(.clk (clk_100M),.rst_n (rst_n),.en (en), //上升沿触发窗口计算.win_type (win_type), //窗口类型1:矩形窗2:图基窗3:三角窗4:汉宁窗5:海明窗6:布莱克曼窗.n (n), //滤波器阶数.i (i), //窗口索引值0 ~ n-1.busy (busy), //指示模块是否计算完成.win (win)
);//进行一组FIR_win的计算
task cal_win;input [3:0] WIN_TYPE;input [15:0] N;integer k;beginn N;win_type WIN_TYPE;#10;for (k 0; k N; k k 1b1) begini k;en 1b1;wait(busy);#10;en 1b0;wait(~busy);#10;endend
endtaskinitial beginrst_n 1b0;en 1b0;win_type 1b1;n 16d16;i 16d0;#100;rst_n 1b1;#100;cal_win(1, 64); //矩形窗#100;cal_win(3, 64); //三角窗#100;cal_win(2, 64); //图基窗#100;cal_win(4, 64); //汉宁窗#100;cal_win(5, 64); //海明窗#100;cal_win(6, 64); //布莱克曼窗#200;$stop;
endendmodule仿真结果如下 滤波器系数计算
FIR 滤波器冲激响应 这里给出理想低通 FIR 滤波器理想高通 FIR 滤波器、理想带通 FIR 滤波器、理想带阻 FIR 滤波器的冲激响应函数表达式
低通 h L P ( n ) sin ( 2 π f c f s s ) π s , where s ∣ n − N 2 ∣ , n 0 , 1 , . . . , N h_{LP}(n)\frac{\sin(\frac{2\pi f_{c}}{f_s}s)}{\pi s},\ \text{where}\ s|n-\frac{N}{2}|,\ n0,1,...,N hLP(n)πssin(fs2πfcs), where s∣n−2N∣, n0,1,...,N
其中 f s f_s fs 为采样率 f c f_c fc 为截止频率。
高通 h H P ( n ) sin ( π s ) − sin ( 2 π f c f s s ) π s , where s ∣ n − N 2 ∣ , n 0 , 1 , . . . , N h_{HP}(n)\frac{\sin(\pi s)-\sin(\frac{2\pi f_{c}}{f_s}s)}{\pi s},\ \text{where}\ s|n-\frac{N}{2}|,\ n0,1,...,N hHP(n)πssin(πs)−sin(fs2πfcs), where s∣n−2N∣, n0,1,...,N
带通 h B P ( n ) sin ( 2 π f c 2 f s s ) − sin ( 2 π f c 1 f s s ) π s , where s ∣ n − N 2 ∣ , n 0 , 1 , . . . , N h_{BP}(n)\frac{\sin(\frac{2\pi f_{c2}}{f_s}s)-\sin(\frac{2\pi f_{c1}}{f_s}s)}{\pi s},\ \text{where}\ s|n-\frac{N}{2}|,\ n0,1,...,N hBP(n)πssin(fs2πfc2s)−sin(fs2πfc1s), where s∣n−2N∣, n0,1,...,N
其中 f c 1 f_{c1} fc1 为下截止频率 f c 2 f_{c2} fc2 为上截止频率。
带阻 h B S ( n ) sin ( 2 π f c 1 f s s ) sin ( π s ) − sin ( 2 π f c 2 f s s ) π s , where s ∣ n − N 2 ∣ , n 0 , 1 , . . . , N h_{BS}(n)\frac{\sin(\frac{2\pi f_{c1}}{f_s}s)\sin(\pi s)-\sin(\frac{2\pi f_{c2}}{f_s}s)}{\pi s},\ \text{where}\ s|n-\frac{N}{2}|,\ n0,1,...,N hBS(n)πssin(fs2πfc1s)sin(πs)−sin(fs2πfc2s), where s∣n−2N∣, n0,1,...,N 在实际设计中FIR 滤波的数据要加窗以将无限冲激的 sinc 函数截断为有限长即窗函数法 FIR 滤波器设计因此将以上冲激响应与窗函数相乘即可。在计算以上冲激函数时当阶数 N 为偶数时则会在 n N / 2 nN/2 nN/2 时出现除零的问题此时利用洛必达法则进行计算即可。
verilog 实现
/* * file : FIR_firwin_generator.v* author : 今朝无言* lab : WHU-EIS-LMSWE* date : 2024-09-26* version : v1.0* description : 生成指定阶数、指定类型的FIR滤波窗口*/
default_nettype none
module FIR_firwin_generator(
input wire clk,
input wire rst_n,input wire en, //上升沿触发窗口计算
input wire [1:0] band_type, //滤波器类型0:低通LP1:高通HP2:带通BP3:带阻BS
input wire signed [15:0] fs, //采样率注意fln,fhn均应小于fs/2
input wire signed [15:0] fln, //滤波器下频点LP,HP,BP,BS均会用到
input wire signed [15:0] fhn, //滤波器上频点BP,BS用到
input wire [3:0] win_type, //窗函数类型1:矩形窗2:图基窗Tukey3:三角窗4:汉宁窗Hann5:海明窗Hamming6:布莱克曼窗Blackman
input wire signed [15:0] n, //滤波器阶数 注意HP/BS的阶数应为偶数奇数阶的系数不可靠
input wire signed [15:0] i, //0~n共n1个值output wire busy, //指示模块是否计算完成
output wire signed [15:0] firwin
);reg signed [31:0] firwin_buf 32sd256;
reg signed [15:0] firwin_buf_d0 16sd256; //8-8有符号定点数
reg busy_buf 1b0;assign firwin firwin_buf_d0;
assign busy busy_buf;localparam S_IDLE 4h1;
localparam S_CAL 4h2;
localparam S_END 4h4;reg [3:0] state S_IDLE;
reg [3:0] next_state;always (posedge clk) beginif(~rst_n) beginstate S_IDLE;endelse beginstate next_state;end
endalways (*) begincase(state)S_IDLE: beginif(en_pe) beginnext_state S_CAL;endelse beginnext_state S_IDLE;endendS_CAL: beginif(cnt 4d12) begin //最迟在cnt7可以读取窗函数值并计算firwin随后本模块可计算firwinnext_state S_END;endelse beginnext_state S_CAL;endendS_END: beginnext_state S_IDLE;enddefault: beginnext_state S_IDLE;endendcase
end//firwin_buf
always (posedge clk) begincase(state)S_CAL: begincase(band_type)2d0: begin //LPif(cnt 4d3) beginif((~n[0]) (i_buf n/4sd2)) begin //偶数阶滤波器计算最中间的滤波器系数 即洛必达求0时的值firwin_buf (({fln, 16b0} / fs) * 16sd804) 8; //3.1415 804/256endelse beginfirwin_buf sin_val_s / s_mlti2 * 4sd2;endendelse if(cnt 4d7) beginfirwin_buf (firwin_buf * win) 16;endelse beginfirwin_buf firwin_buf;endend2d1: begin //HPif(cnt 4d3) beginif((~n[0]) (i_buf n/4sd2)) begin //偶数阶滤波器计算最中间的滤波器系数 即洛必达求0时的值firwin_buf ((32sd32768 - {fln, 16b0} / fs) * 16sd804) 8;endelse beginfirwin_buf sin_val_s;endendelse if(cnt 4d7) beginif((~n[0]) (i_buf n/4sd2)) beginfirwin_buf firwin_buf;endelse beginfirwin_buf (firwin_buf - sin_val_s) / s_mlti2 * 4sd2;endendelse if(cnt 4d8) beginfirwin_buf (firwin_buf * win) 16;endelse beginfirwin_buf firwin_buf;endend2d2: begin //BPif(cnt 4d3) beginif((~n[0]) (i_buf n/4sd2)) begin //偶数阶滤波器计算最中间的滤波器系数 即洛必达求0时的值firwin_buf ((({fhn, 16b0} - {fln, 16b0}) / fs) * 16sd804) 8;endelse beginfirwin_buf sin_val_s;endendelse if(cnt 4d7) beginif((~n[0]) (i_buf n/4sd2)) beginfirwin_buf firwin_buf;endelse beginfirwin_buf (firwin_buf - sin_val_s) / s_mlti2 * 4sd2;endendelse if(cnt 4d8) beginfirwin_buf (firwin_buf * win) 16;endelse beginfirwin_buf firwin_buf;endend2d3: begin //BSif(cnt 4d3) beginif((~n[0]) (i_buf n/4sd2)) begin //偶数阶滤波器计算最中间的滤波器系数 即洛必达求0时的值firwin_buf (({fln, 16b0} / fs 32sd32768 - {fhn, 16b0} / fs) * 16sd804) 8;endelse beginfirwin_buf sin_val_s;endendelse if(cnt 4d7) beginif((~n[0]) (i_buf n/4sd2)) beginfirwin_buf firwin_buf;endelse beginfirwin_buf firwin_buf sin_val_s;endendelse if(cnt 4d11) beginif((~n[0]) (i_buf n/4sd2)) beginfirwin_buf firwin_buf;endelse beginfirwin_buf (firwin_buf - sin_val_s) / s_mlti2 * 4sd2;endendelse if(cnt 4d12) beginfirwin_buf (firwin_buf * win) 16;endelse beginfirwin_buf firwin_buf;endenddefault: beginfirwin_buf firwin_buf;endendcaseenddefault: beginfirwin_buf firwin_buf;endendcase
end//i_buf
reg signed [15:0] i_buf;
always (posedge clk) beginif(i (n 1)) begini_buf n - i; //滤波器是对称的这里处理后利用i_buf计算滤波器系数endelse begini_buf i;end
end//sin_phase
reg [31:0] multi_tmp;
always (posedge clk) begincase(state)S_CAL: beginsin_phase multi_tmp[15:0];enddefault: beginsin_phase sin_phase;endendcase
endreg signed [15:0] s_mlti2;
always (*) begins_mlti2 n - i_buf * 4sd2;
endalways (*) begincase(state)S_CAL: begincase(band_type)2d0: begin //LPmulti_tmp (({fln, 16b0} / fs) * s_mlti2) 1;end2d1: begin //HPif(cnt 4d3) beginmulti_tmp {s_mlti2, 14b0};endelse beginmulti_tmp (({fln, 16b0} / fs) * s_mlti2) 1;endend2d2: begin //BPif(cnt 4d3) beginmulti_tmp (({fhn, 16b0} / fs) * s_mlti2) 1;endelse beginmulti_tmp (({fln, 16b0} / fs) * s_mlti2) 1;endend2d3: begin //BSif(cnt 4d3) beginmulti_tmp (({fln, 16b0} / fs) * s_mlti2) 1;endelse if(cnt 4d7) beginmulti_tmp {s_mlti2, 14b0};endelse beginmulti_tmp (({fhn, 16b0} / fs) * s_mlti2) 1;endenddefault: beginmulti_tmp 32d0;endendcaseenddefault: beginmulti_tmp 32d0;endendcase
end//窗函数
wire signed [15:0] win;
FIR_windows_generator FIR_windows_generator_inst(.clk (clk),.rst_n (rst_n),.en (en), //上升沿触发窗口计算.win_type (win_type), //窗口类型1:矩形窗2:图基窗Tukey3:三角窗4:汉宁窗Hann5:海明窗Hamming6:布莱克曼窗Blackman.n (n 1b1), //窗口长度滤波器阶数1.i (i), //窗口索引值.busy (), //指示模块是否计算完成.win (win)
);//en 边沿检测
wire en_pe;
detect_sig_edge detect_sig_edge_inst(.clk (clk), //工作时钟.sig (en), //待检测信号.sig_pe (en_pe), //信号上升沿.sig_ne (), //下降沿.sig_de () //双边沿
);//cnt 控制计算流程
reg [3:0] cnt 4d0;
always (posedge clk) begincase(state)S_IDLE: begincnt 4d0;endS_CAL: begincnt cnt 1b1;enddefault: begincnt 4d0;endendcase
end//busy_buf
always (*) begincase(state)S_IDLE: beginbusy_buf 1b0;enddefault: beginbusy_buf 1b1;endendcase
end//sin_rom
reg [15:0] sin_phase 16d0;
wire [15:0] sin_out;
sin_gen sin_gen_inst(.clk (clk),.phase (sin_phase), //相位0~65535对应[0~2pi).sin_out (sin_out) //0~65535
);wire signed [15:0] sin_val_s;
assign sin_val_s {~sin_out[15], sin_out[14:0]};//firwin_buf_d0
always (posedge clk) begincase(state)S_END: beginfirwin_buf_d0 firwin_buf[15:0];enddefault: beginfirwin_buf_d0 firwin_buf_d0;endendcase
endendmodule测试 testbench 如下
timescale 1ns/100psmodule FIR_firwin_generate_tb();reg clk_100M 1b1;
always #5 beginclk_100M ~clk_100M;
endreg rst_n 1b1;reg en; //上升沿触发窗口计算reg [1:0] band_type; //滤波器类型0:低通LP1:高通HP2:带通BP3:带阻BS
reg [15:0] fs; //采样率注意fln,fhn均应小于fs/2
reg [15:0] fln; //滤波器下频点LP,HP,BP,BS均会用到
reg [15:0] fhn; //滤波器上频点BP,BS用到
reg [3:0] win_type; //窗口类型1:矩形窗2:图基窗3:三角窗4:汉宁窗5:海明窗6:布莱克曼窗
reg [15:0] n; //滤波器阶数
reg [15:0] i; //窗口索引值0 ~ nwire busy;
wire signed [15:0] firwin;FIR_firwin_generator FIR_firwin_generator_inst(.clk (clk_100M),.rst_n (rst_n),.en (en), //上升沿触发窗口计算.band_type (band_type), //滤波器类型0:低通LP1:高通HP2:带通BP3:带阻BS.fs (fs), //采样率注意fln,fhn均应小于fs/2.fln (fln), //滤波器下频点LP,HP,BP,BS均会用到.fhn (fhn), //滤波器上频点BP,BS用到.win_type (win_type), //窗函数类型1:矩形窗2:图基窗Tukey3:三角窗4:汉宁窗Hann5:海明窗Hamming6:布莱克曼窗Blackman.n (n), //滤波器阶数.i (i), //0~n共n1个值.busy (busy),.firwin (firwin)
);//进行一组FIR_win的计算
task cal_firwin;input [1:0] BAND_TYPE;input [15:0] Fs;input [15:0] Fln;input [15:0] Fhn;input [3:0] WIN_TYPE;input [15:0] N;integer k;beginband_type BAND_TYPE;fs Fs;fln Fln;fhn Fhn;win_type WIN_TYPE;n N;#10;for (k 0; k N; k k 1b1) begini k;en 1b1;wait(busy);#10;en 1b0;wait(~busy);#10;endend
endtaskinitial beginrst_n 1b0;en 1b0;band_type 2d0;fs 16d100;fln 16d10;fhn 16d60;win_type 4d1;n 16d64;i 16d0;#100;rst_n 1b1;#100;//可与matlab函数fir1(fir_N, Wn, band_type, win)的结果比对 注意其中的Wn是 [fln/f_ny, fhn/f_ny]其中f_nyfs/2cal_firwin(2d0, 16d1000, 16d50, 16d100, 4d1, 16d64); //LP矩形窗#200;cal_firwin(2d0, 16d1000, 16d50, 16d100, 4d5, 16d64); //LP海明窗#200;cal_firwin(2d0, 16d1000, 16d50, 16d100, 4d6, 16d64); //LP布莱克曼窗#200;cal_firwin(2d0, 16d1000, 16d50, 16d100, 4d6, 16d63); //LP布莱克曼窗#200;cal_firwin(2d1, 16d1000, 16d50, 16d100, 4d1, 16d64); //HP矩形窗#200;cal_firwin(2d1, 16d1000, 16d50, 16d100, 4d1, 16d63); //HP矩形窗 HP的阶数应为偶数否则系数不可靠matlab fir1也是只能生成偶数阶的HP#200;cal_firwin(2d2, 16d1000, 16d50, 16d100, 4d1, 16d64); //BP矩形窗#200;cal_firwin(2d2, 16d1000, 16d50, 16d100, 4d1, 16d63); //BP矩形窗#200;cal_firwin(2d2, 16d1000, 16d50, 16d100, 4d5, 16d63); //BP海明窗#200;cal_firwin(2d3, 16d1000, 16d50, 16d100, 4d1, 16d64); //BS矩形窗#200;cal_firwin(2d3, 16d1000, 16d50, 16d100, 4d1, 16d63); //BS矩形窗 BS的阶数也应为偶数#200;cal_firwin(2d3, 16d1000, 16d50, 16d100, 4d5, 16d64); //BS海明窗#200;#200;$stop;
endendmodule仿真结果如下 读者可与 Matlab 的 fir1 函数结果进行比对。
